Smsc Lan9500 Drivers For Mac

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  1. Lan9500 Driver Windows 7 Panasonic

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Sep 4, 2013 - The SMSC LAN9500 is a Hi-Speed USB 2.0 to 10/100 Ethernet Controller. Device Drivers ---> [*] Network device support ---> USB Network Adapters. The LAN9500 will start in a default mode and the MAC address will be.

Automatic 32-bit CRC generation and checking — Automatic payload padding and pad removal — Loop-back modes — TCP/UDP/IP/ICMP checksum offload support 1 = LAN9500A/LAN9500Ai only SMSC LAN950x Family LAN9500/LAN9500i LAN9500A/LAN9500Ai USB 2.0 to 10/100 Ethernet Controller — Flexible address filtering modes – One 48-bit perfect address –. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’. DC Specifications. 51 8.5 AC Specifications. 53 8.5.1 Equivalent Test Load.

53 8.5.2 Power-On Configuration Strap Valid Timing. 54 8.5.3 Reset and Configuration Strap Timing. 55 8.5.4 EEPROM Timing. 56 8.5.5 MII Interface Timing.

57 8.5.6 Turbo MII Interface Timing. 59 8.6 Clock Circuit.

61 SMSC LAN950x Family 3 DATASHEET Revision 1.0 (05-17-10). Chapter 9 Package Outline.

62 Chapter 10 Datasheet Revision History. 64 Revision 1.0 (05-17-10) USB 2.0 to 10/100 Ethernet Controller 4 DATASHEET Datasheet SMSC LAN950x Family. Figure 8.5 MII Transmit Timing. 57 Figure 8.6 MII Receive Timing. 58 Figure 8.7 Turbo MII Transmit Timing.

59 Figure 8.8 Turbo MII Receive Timing. 60 Figure 9.1 LAN950x 56-QFN Package. 62 Figure 9.2 LAN950x 56-QFN Recommended PCB Land Pattern. 63 SMSC LAN950x Family 5 DATASHEET Revision 1.0 (05-17-10). Table 8.20 Turbo MII Transmit Timing Values Table 8.21 Turbo MII Receive Timing Values. 60 Table 8.22 Crystal Specifications.

61 Table 9.1 LAN950x 56-QFN Dimensions. 62 Table 10.1 Customer Revision History. Best open source office suite for mac. 64 Revision 1.0 (05-17-10) USB 2.0 to 10/100 Ethernet Controller 6 DATASHEET Datasheet SMSC LAN950x Family. USB 2.0 to 10/100 Ethernet Controller Datasheet Chapter 1 LAN950x Family Differences Overview The SMSC LAN950x is a family of high performance Hi-Speed USB 2.0 to 10/100 Ethernet controllers. The “x” in the part number is a generic term referring to the entire family, which includes the following devices. For LAN9500A/LAN9500Ai: 0 Ohm 49.9 49.9 49.9 49.9 Ohm Ohm Ohm Ohm Ethernet Magnetics/RJ45 R2 For LAN9500/LAN9500i: 12.4K Ohm 1% For LAN9500A/LAN9500Ai: 12.0K Ohm 1% For LAN9500/LAN9500i: 1M Ohm 1% For LAN9500A/LAN9500Ai: Do Not Populate R3 25.000MHz 33pF 33pF 8 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet To Ethernet SMSC LAN950x Family. Packet', 'Wake On LAN', and 'Link Status Change' wake events.

These wake events can be programmed to initiate a USB remote wakeup. An internal EEPROM controller exists to load various USB configuration information and the device MAC address. The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG. SMSC LAN950x Family 10/100 FIFO Ethernet. All four SUSPEND states are supported by LAN9500A/LAN9500Ai.

SUSPEND3 is not supported by LAN9500/LAN9500i. Revision 1.0 (05-17-10) (Note 2.1) variations of USB suspend: SUSPEND0, SUSPEND1, 2.1) Supports GPIO and “Good Packet” remote wakeup event.

A “Good Packet” 10 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. Custom operation without EEPROM is also provided (LAN9500A/LAN9500Ai only). 2.1.7 General Purpose I/O When configured for internal PHY mode eleven GPIOs are supported. All GPIOs can serve as remote wakeup events when the LAN950x suspended state.

SMSC LAN950x Family 11 DATASHEET Revision 1.0 (05-17-10). PIN QFN (TOP VIEW) VSS Figure 3.1 Pin Assignments (TOP VIEW) Chapter 6, 'PME Operation,' on page 40 12 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet nSPDLED/GPIO10.

28 nLNKALED/GPIO9. 27 nFDXLED/GPIO8.

26 VDD33IO 25 nRESET. 24 MDIO/GPIO1. 23 MDC/GPIO2 22 VDDCORE 21 VBUSDET. VDDUSBPLL 17 USBRBIAS 16 VDD33A 15 for additional SMSC LAN950x Family. Mode Only) Management Data (External PHY Mode) General Purpose I/O 1 (Internal PHY 1 Mode Only) SMSC LAN950x Family Table 3.1 MII Interface Pins BUFFER SYMBOL TYPE RXER IS In external PHY mode, the signal on this pin is input from the external PHY and indicates a (PD) receive error in the packet. DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet DESCRIPTION (LAN9500A/LAN9500Ai ONLY): GPIO7 may provide additional PHY Link Up related functionality.

A 3-wire style 1K/2K/4K EEPROM that is organized for 128 x 8-bit or 256/512 x 8-bit operation must be used. For more information on for more information on SMSC LAN950x Family.

Configuration strap values are latched on power-on reset and system reset. Configuration straps are identified by an underlined symbol name. Signals that function as configuration straps must be augmented with an external resistor when connected to a load.

SMSC LAN950x Family Table 3.1 MII Interface Pins (continued) BUFFER. The EECS output may tri-state briefly during power-up. Some EEPROM devices may be prone to false selection during this time. When an EEPROM is used, an external pull-down resistor is recommended on this signal to prevent false selection.

Refer to your EEPROM manufacturer’s datasheet for additional information. For more information on SMSC LAN950x Family. PHY Mode) JTAG Test Data Input (Internal PHY Mode) 1 Receive Data 3 (External PHY Mode) SMSC LAN950x Family Table 3.3 JTAG Pins BUFFER SYMBOL TYPE nTRST IS In internal PHY mode, this active-low pin functions as the JTAG test port reset input. By default this pin is configured as a GPIO. (LAN9500A/LAN9500Ai only) This pin may serve as the PMEMODESEL input when External PHY and PME modes of operation are in effect.

Smsc Lan9500 Drivers For Mac

Lan9500 Driver Windows 7 Panasonic

Refer to Chapter 6, 'PME Operation,' on page 40 for additional information. By default this pin is configured as a GPIO. SMSC LAN950x Family. Upstream VBUS Power 1 Test 1 1 Test 2 1 Test 3 1 SMSC LAN950x Family Table 3.4 Miscellaneous Pins (continued) BUFFER SYMBOL TYPE OD12 This pin is driven low (LED on) when the Ethernet operating speed is 100Mbs, or during auto- (PU) negotiation.

This pin is driven high during 10Mbs operation, or during line isolation. The functionality of this pin may be swapped to USB DMINUS via the PORTSWAP configuration strap.

Chapter 4, 'Power Connections,' on and the device reference schematic for This pin can also be driven by a single- ended clock oscillator. When this method is used, XO should be left unconnected DESCRIPTION SMSC LAN950x Family. Output Exposed Ground pad on package bottom (Figure 3.1) NUM PINS NAME No Connect 1 SMSC LAN950x Family Table 3.6 Ethernet PHY Pins (continued) BUFFER SYMBOL TYPE nPHYINT O8 In internal PHY mode, this pin can be configured to output the internal PHY interrupt signal.

For

Note: nPHYINT IS. Chapter 6, 'PME Operation,' on page 40 22 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet PIN NUM PIN NAME 43 TXEN 44 RXER 45 CRS/GPIO3 46 COL/GPIO0 Note 3.4 47 TXCLK 48 VDD33IO 49 TEST1 50 VDDCORE 51 VDD33IO 52 VDD33IO 53 TXD3/GPIO7/ EEPSIZE 54 TXD2/GPIO6/ PORTSWAP 55 TXD1/GPIO5/ RMTWKP 56 TXD0/GPIO4/ EEPDISABLE for additional SMSC LAN950x Family. When connected to a load that must be pulled low, an external resistor must be added. AI Analog input AIO Analog bi-directional ICLK Crystal oscillator input pin OCLK Crystal oscillator output pin P Power pin SMSC LAN950x Family Table 3.10 Buffer Types DESCRIPTION 23 DATASHEET Revision 1.0 (05-17-10).

Internal Core Regulator (IN) (OUT) Core Logic PLL & Ethernet PHY USB PHY Figure 4.1 Power Connections 24 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet VDDCORE VDDCORE 1 F 0.1 ESR 0.5A 120 @ 100MHz VDDPLL 0.1 F 0.5A 120 @ 100MHz VDDUSBPLL 0.1 F SMSC LAN950x Family. MAC Address 23:16 04h MAC Address 31:24 05h MAC Address 39:32 06h MAC Address 47:40 07h Full-Speed Polling Interval for Interrupt Endpoint 08h Hi-Speed Polling Interval for Interrupt Endpoint SMSC LAN950x Family Table 5.1 EEPROM Format EEPROM CONTENTS 25 DATASHEET Revision 1.0 (05-17-10). GPIO PME Flags Note: EEPROM byte addresses past the indicated address can be used to store data for any purpose: LAN9500/LAN9500i - 1Dh LAN9500A/LAN9500Ai - 20h Revision 1.0 (05-17-10) Table 5.1 EEPROM Format (continued) Bits 7:3 Unused. 26 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. Power Method 0 = The device is bus powered The device is self powered. SMSC LAN950x Family Table 5.2 Configuration Flags DESCRIPTION FUNCTION Speed Indicator Link and Activity Indicator Full Duplex Link Indicator Speed Indicator Link Indicator Activity Indicator 27 DATASHEET. GPIO PME is signaled this bit is ignored this bit is ignored this bit is ignored this bit is ignored.

28 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet GPIO PME Length bit of this flag GPIO PME Polarity bit of SMSC LAN950x Family. Hi-Speed Polling Interval (mS) Configuration Flags Maximum Power (mA) Vendor ID Product ID Note: The Configuration Flags are affected by the PWRSEL and RMTWKP straps. SMSC LAN950x Family Table 5.3 GPIO PME Flags (continued) DESCRIPTION is 0, this bit is ignored. Table 5.4 EEPROM Defaults DEFAULT VALUE FFFFFFFFFFFFh. Revision 1.0 (05-17-10) provide an example of how the contents of a EEPROM are formatted in the Table 5 dump of the EEPROM memory (256-byte EEPROM), while VALUE.

30 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. SMSC LAN950x Family DESCRIPTION EEPROM Programmed Indicator MAC Address Full-Speed Polling Interval for Interrupt Endpoint (1ms) Hi-Speed Polling Interval for Interrupt Endpoint (4ms) Configuration Flags - The device is bus powered and supports remote wakeup. Language ID Descriptor 0409h, English. FA 63h 09 Revision 1.0 (05-17-10) DESCRIPTION Manufacturer ID String (“SMSC” in UNICODE) Size of Product Name String Descriptor (16 bytes) Descriptor Type (String Descriptor - 03h) Product Name String (“LAN9500” in UNICODE) Size of Serial Number String Descriptor (16 bytes) Descriptor Type (String Descriptor - 03h) Serial Number String (“0005123” in UNICODE). A0 86h FA 87h 09 SMSC LAN950x Family DESCRIPTION Descriptor Type (Interface Descriptor - 04h) Number identifying this Interface Value used to select alternative setting Number of Endpoints used for this interface (Less endpoint 0) Class Code Subclass Code Protocol Code Index of String Descriptor Describing this interface. Value used to select alternative setting Number of Endpoints used for this interface (Less endpoint 0) Class Code Subclass Code Protocol Code Index of String Descriptor Describing this interface Data storage for use by Host as desired 34 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. SMSC LAN950x Family provide an example of how the contents of a EEPROM are formatted in the Table 5 dump of the EEPROM memory (256-byte EEPROM), VALUE.

Full-Speed Configuration and Interface Descriptor Length (18bytes) Full-Speed Configuration and Interface Descriptor Word Offset (42h) Corresponds to EEPROM Byte Offset 84h GPIO7:0 Wake Enables - GPIO7:0 Not Used For Wakeup Signaling GPIO10:8 Wake Enables - GPIO10 Used For Wakeup Signaling 36 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. Driver, GPIO10 Active High Detection. PAD BYTE - Used To Align Following Descriptor on WORD Boundary Size of Manufacturer ID String Descriptor (10 bytes) Descriptor Type (String Descriptor - 03h) Manufacturer ID String (“SMSC” in UNICODE) Size of Product Name String Descriptor (18 bytes) Descriptor Type (String Descriptor - 03h) Product Name String (“LAN9500A” in UNICODE). Index of Product String Descriptor Index of Serial Number String Descriptor Number of Possible Configurations Size of Full-Speed Configuration Descriptor in bytes (9 bytes) Descriptor Type (Configuration Descriptor - 02h) Total length in bytes of data returned (0027h = 39 bytes) Number of Interfaces 38 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. Attribute Register Initialization Descriptor RAM Initialization Enable Descriptor RAM and Flag Attribute Registers as Source Inhibit Reset of Select System Control and Status Register Elements SMSC LAN950x Family DESCRIPTION Value to use as an argument to select this configuration Index of String Descriptor describing this configuration Bus powered and remote wakeup enabled. Enable Embedded Controller Revision 1.0 (05-17-10) Host Processor Chipset DP/DM PME VBUSDET PMECLEAR PMEMODESEL Figure 6.1 Typical Application 40 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet Figure 6.1 illustrates HC LAN9500A/ LAN9500Ai EEPROM SMSC LAN950x Family.

Note: When in PME mode, nRESET or POR will always cause the contents of the EEPROM to be reloaded. Note: GPIO10 may be used in PME and External PHY mode to connect to an external PHY’s Link LED, in order to generate a PHY Link Up wake event. SMSC LAN950x Family Figure 6.1 assumes that the Host Processor and the Chipset are powered or GPIO7:0 Wakeup Enables Enables. Note: A POR occurring when PMEMODESEL = 1 and an EEPROM present with the GPIO PME Enable set results in the device entering PME Mode.

Revision 1.0 (05-17-10 (enabled (PME signaled via level on GPIO pin (NA (high level signals event (Push-Pull (Magic Packet wakeup (Active-low detection) 42 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family. Device Has EEPROM With GPIO PME Enable =1, Enters PME Mode Wakeup Event Detected Device Asserts PME EC To Wake System To Process Wakeup Event?

EC Asserts PMECLEAR Device Resets And Deasserts PME SMSC LAN950x Family Or Via Circuitry False By Device? True EC Detects PME Yes No EC Signals Enable To Host. LED would be connected to a GPIO. Ethernet SMSC LAN9500A/ LAN9500Ai.ZZZ Revision 1.0 (05-17-10) 1 Remove Ethernet Cable 2 USB Electricals Detach Battery-powered Netbook PC 3 may enter C3 sleep mode Figure 7.1 Device Detach 44 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet.

SMSC LAN950x Family. USB 2.0 to 10/100 Ethernet Controller Datasheet Ethernet SMSC LAN9500A/ LAN9500Ai SMSC LAN950x Family 1 Insert Ethernet Cable 2 USB Electricals Attach LAN9500A enumerates and 3 the driver is loaded Figure 7.2 Device Attach 45 DATASHEET Revision 1.0 (05-17-10).

A 46 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet 8.0.5V Note 8 +150.Note 8.5 8.+/-8kV 8.+/-15kV o C for industrial version. Note 8.4 SMSC LAN950x Family o C. Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) Table 8.2 Power Consumption/Dissipation - SUSPEND0 (LAN9500A/LAN9500Ai) PARAMETER Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) SMSC LAN950x Family MIN TYPICAL 257 395 MIN TYPICAL. Note: SUSPEND2 power consumption/dissipation values were measured in bus-powered mode.

Revision 1.0 (05-17-10) USB 2.0 to 10/100 Ethernet Controller MIN TYPICAL MIN TYPICAL 7.0 23.5 27.5 MIN TYPICAL 0.624 2.1 2.1 MIN TYPICAL 1.6 5.3 5.3 48 DATASHEET Datasheet MAX UNIT MAX UNIT MAX UNIT MAX UNIT SMSC LAN950x Family. Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) 10BASE-T Full Duplex (USB Full-Speed) Supply current (VDD33IO, VDD33A) (Device Only) Power Dissipation (Device Only) Power Dissipation (Device and Ethernet components) SMSC LAN950x Family MIN TYPICAL 24.5 81.2 85.1 MIN. Customer Evaluation Board Operational Current Consumption. Table 8.10 CEB Operational Current Consumption (LAN9500/LAN9500i) PARAMETER 100BASE-TX Full Duplex (USB High-Speed) Total SMSC Customer Evaluation Board Current Consumption Table 8.11 CEB Operational Current Consumption (LAN9500A/LAN9500Ai) PARAMETER 100BASE-TX Full Duplex (USB High-Speed) Total SMSC Customer Evaluation Board Current Consumption.Total system current consumption as measured on the 5V USB VBUS input to a bus-powered Customer Evaluation Board, where VBUS = 5. ICLK Type Buffer (XI Input) Low Input Level V High Input Level V Note 8.7 This specification applies to all inputs and tri-stated bi-directional pins.

Internal pull-down and pull-up resistors add +/- 50uA per-pin (typical). SMSC LAN950x Family Table 8.12 I/O Buffer Characteristics MIN TYP -0.3 ILI IHI 1.01 1. OS SYMBOL MIN TYP MAX V 2.2 2.5 OUT V 300 420 585 DS 52 DATASHEET Datasheet UNITS NOTES mVpk Note 8.10 mVpk Note 8.10% Note 8.10 5.0 nS Note 8.10 0.5 nS Note 8. 1.4 nS Note 8.12 UNITS NOTES 2.8 V Note 8.13 mV SMSC LAN950x Family. Universal Serial Bus Revision 2.0 specification for detailed USB timing information. 8.5.1 Equivalent Test Load Output timing specifications assume the 25pF equivalent test load illustrated in unless otherwise specified.

OUTPUT SMSC LAN950x Family 25 pF Figure 8.1 Output Equivalent Test Load 53 DATASHEET Figure 8.1 below, Revision 1. Figure 8.2 Power-On Configuration Strap Valid Timing Table 8.15 Power-On Configuration Strap Valid Timing SYMBOL t Configuration strap valid time cfg Revision 1.0 (05-17-10) 2.0V t cfg DESCRIPTION 54 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet MIN TYP MAX UNITS 15 mS SMSC LAN950x Family. Configuration strap pins setup to nRESET deassertion css t Configuration strap pins hold after nRESET deassertion csh t Output drive after deassertion odad SMSC LAN950x Family t rstia t t css csh t odad Figure 8.3 nRESET Reset Pin Timing DESCRIPTION 55 DATASHEET. Figure 8.4 EEPROM Timing Table 8.17 EEPROM Timing Values MIN 1110 550 550 1070 30 550 550 90 0 580 0 1070 56 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t csl t cklcsl t ckldis t dhcsl TYP MAX UNITS 1130 ns 570 ns 570 600 SMSC LAN950x Family. TXD3:0, TXEN output valid from rising edge of val TXCLK t TXD3:0, TXEN output hold from rising edge of hold TXCLK Note 8.14 Timing was designed for system load between 10 pf and 25 pf. SMSC LAN950x Family t clkp t t clkh clkl t t val val.

Figure 8.6 MII Receive Timing Table 8.19 MII Receive Timing Values MIN 40 t.0.4 clkp t.0.4 clkp 8.0 9.0 58 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t hold t su MAX UNITS NOTES ns t.0.6 ns clkp t.0.6 ns clkp ns Note 8.15 ns Note 8.15 SMSC LAN950x Family. TXD3:0, TXEN output valid from rising edge of val TXCLK t TXD3:0, TXEN output hold from rising edge of hold TXCLK Note 8.16 Timing was designed for system load between 10 pf and 15 pf. SMSC LAN950x Family t clkp t t clkh clkl t t val val.

Figure 8.8 Turbo MII Receive Timing MIN 20 t.0.4 clkp t.0.4 clkp 5 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet t hold t su MAX UNITS NOTES ns t.0.6 ns clkp t.0.6 ns clkp ns Note 8.17 ns Note 8.17 SMSC LAN950x Family. The XO/XI pin and PCB capacitance values are required to accurately calculate the value of the two external load capacitors. These two external load capacitors determine the accuracy of the 25.000 MHz frequency.

SMSC LAN950x Family Table 8.22 for the recommended crystal specifications. Center Pad to Pin Clearance 62 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet REMARKS Overall Package Height Standoff Mold Cap Thickness X/Y Body Size X/Y Mold Cap Size X/Y Exposed Pad Size Terminal Length Terminal Width Terminal Pitch SMSC LAN950x Family. The pin 1 identifier may vary, but is always located within the zone indicated. Figure 9.2 LAN950x 56-QFN Recommended PCB Land Pattern SMSC LAN950x Family 63 DATASHEET Revision 1.0 (05-17-10). Chapter 10 Datasheet Revision History REVISION LEVEL AND DATE SECTION/FIGURE/ENTRY Rev. 1.0 Initial Release (05-17-10) Revision 1.0 (05-17-10) Table 10.1 Customer Revision History 64 DATASHEET USB 2.0 to 10/100 Ethernet Controller Datasheet CORRECTION SMSC LAN950x Family.